diff --git a/.vscode/launch.json b/.vscode/launch.json new file mode 100644 index 0000000..d62df2f --- /dev/null +++ b/.vscode/launch.json @@ -0,0 +1,12 @@ +{ + "version": "0.2.0", + "configurations": [ + { + "type": "nrf-connect", + "request": "launch", + "name": "Launch build_1", + "config": "${workspaceFolder}/build_1", + "runToEntryPoint": "main" + } + ] +} \ No newline at end of file diff --git a/CMakeLists.txt b/CMakeLists.txt index c2a24f9..c465196 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -12,5 +12,12 @@ GET_DEVICE_CONFIG_FILES(${BOARD} boards) find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) project(SensorSoftwareTest_) +target_include_directories(app PRIVATE +common + ${ZEPHYR_BASE}/../modules/hal/nordic/nrfx/hal +) + target_sources(app PRIVATE main.c) -target_include_directories(app PRIVATE common) + +# Set the build type to Debug +set(CMAKE_BUILD_TYPE Debug) \ No newline at end of file diff --git a/boards/arm/e73_tmb/Kconfig.board b/boards/arm/e73_tmb/Kconfig.board new file mode 100644 index 0000000..2d259de --- /dev/null +++ b/boards/arm/e73_tmb/Kconfig.board @@ -0,0 +1,6 @@ +# Copyright (c) 2024 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_E73_TMB + bool "e73-tmb" + depends on SOC_NRF52810_QFAA diff --git a/boards/arm/e73_tmb/Kconfig.defconfig b/boards/arm/e73_tmb/Kconfig.defconfig new file mode 100644 index 0000000..5e137fd --- /dev/null +++ b/boards/arm/e73_tmb/Kconfig.defconfig @@ -0,0 +1,13 @@ +# Copyright (c) 2024 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_E73_TMB + +config BOARD + default "e73_tmb" + +config BT_CTLR + default BT + + +endif diff --git a/boards/arm/e73_tmb/board.cmake b/boards/arm/e73_tmb/board.cmake new file mode 100644 index 0000000..5a2af1b --- /dev/null +++ b/boards/arm/e73_tmb/board.cmake @@ -0,0 +1,9 @@ +# Copyright (c) 2024 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +board_runner_args(jlink "--device=nrf52810_xxaa" "--speed=4000") +board_runner_args(pyocd "--target=nrf52810" "--frequency=4000000") + +include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake) +include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) +include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake) diff --git a/boards/arm/e73_tmb/e73_tmb.dts b/boards/arm/e73_tmb/e73_tmb.dts new file mode 100644 index 0000000..6f2c939 --- /dev/null +++ b/boards/arm/e73_tmb/e73_tmb.dts @@ -0,0 +1,88 @@ +// Copyright (c) 2024 Nordic Semiconductor ASA +// SPDX-License-Identifier: Apache-2.0 + +/dts-v1/; +#include + +/ { + model = "e73-tmb"; + compatible = "mi,e73-tmb"; + + chosen { + zephyr,console = &uart0; + zephyr,shell-uart = &uart0; + zephyr,uart-mcumgr = &uart0; + zephyr,sram = &sram0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + }; + aliases { + led0 = &myled0; + led1 = &myled1; + }; + + leds { + compatible = "gpio-leds"; + myled0: led_0 { + gpios = <&gpio0 17 GPIO_ACTIVE_LOW>; + }; + + myled1: led_1 { + gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>; + label = "LED"; + }; + }; +}; + +&gpio0 { + status = "okay"; +}; + +&gpiote { + status = "okay"; +}; + +&flash0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x0 0xc000>; + }; + slot0_partition: partition@c000 { + label = "image-0"; + reg = <0xc000 0xa000>; + }; + slot1_partition: partition@16000 { + label = "image-1"; + reg = <0x16000 0xa000>; + }; + scratch_partition: partition@20000 { + label = "image-scratch"; + reg = <0x20000 0xa000>; + }; + storage_partition: partition@2a000 { + label = "storage"; + reg = <0x2a000 0x6000>; + }; + }; +}; + +&uart0 { + status = "okay"; + compatible="nordic,nrf-uart"; + pinctrl-0 = <&uart0_default>; + pinctrl-names = "default"; + current-speed = <115200>; +}; + +&pinctrl { + uart0_default: uart0_default { + group1 { + psels = , ; + }; + }; +}; diff --git a/boards/arm/e73_tmb/e73_tmb_defconfig b/boards/arm/e73_tmb/e73_tmb_defconfig new file mode 100644 index 0000000..24a5a92 --- /dev/null +++ b/boards/arm/e73_tmb/e73_tmb_defconfig @@ -0,0 +1,16 @@ +# Copyright (c) 2024 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_SOC_SERIES_NRF52X=y +CONFIG_SOC_NRF52810_QFAA=y +CONFIG_BOARD_E73_TMB=y + +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable hardware stack protection +CONFIG_HW_STACK_PROTECTION=y + +# Enable debug +CONFIG_CORTEX_M_DEBUG_MONITOR_HOOK=y +CONFIG_SEGGER_DEBUGMON=y diff --git a/boards/nrf52833dk_nrf52833.overlay b/boards/nrf52833dk_nrf52833.overlay deleted file mode 100644 index e5bd2a8..0000000 --- a/boards/nrf52833dk_nrf52833.overlay +++ /dev/null @@ -1,7 +0,0 @@ -&timer0 { - status = "okay"; -}; - -&timer1 { - status = "okay"; -}; diff --git a/boards/nrf52840dk_nrf52840.overlay b/boards/nrf52840dk_nrf52840.overlay deleted file mode 100644 index e5bd2a8..0000000 --- a/boards/nrf52840dk_nrf52840.overlay +++ /dev/null @@ -1,7 +0,0 @@ -&timer0 { - status = "okay"; -}; - -&timer1 { - status = "okay"; -}; diff --git a/boards/nrf52dk_nrf52832.overlay b/boards/nrf52dk_nrf52832.overlay deleted file mode 100644 index e5bd2a8..0000000 --- a/boards/nrf52dk_nrf52832.overlay +++ /dev/null @@ -1,7 +0,0 @@ -&timer0 { - status = "okay"; -}; - -&timer1 { - status = "okay"; -}; diff --git a/boards/nrf5340dk_nrf5340_cpuapp.overlay b/boards/nrf5340dk_nrf5340_cpuapp.overlay deleted file mode 100644 index e5bd2a8..0000000 --- a/boards/nrf5340dk_nrf5340_cpuapp.overlay +++ /dev/null @@ -1,7 +0,0 @@ -&timer0 { - status = "okay"; -}; - -&timer1 { - status = "okay"; -}; diff --git a/boards/nrf9160dk_nrf9160.overlay b/boards/nrf9160dk_nrf9160.overlay deleted file mode 100644 index 0b04e6c..0000000 --- a/boards/nrf9160dk_nrf9160.overlay +++ /dev/null @@ -1,11 +0,0 @@ -&dppic { - status = "okay"; -}; - -&timer0 { - status = "okay"; -}; - -&gpiote { - status = "okay"; -}; diff --git a/main.c b/main.c index 77fcee3..38450fc 100644 --- a/main.c +++ b/main.c @@ -1,207 +1,140 @@ -/* - * Copyright (c) 2022 - 2024, Nordic Semiconductor ASA - * All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * 3. Neither the name of the copyright holder nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ +#include +#include -#include -#include +#include +#include -#define NRFX_LOG_MODULE EXAMPLE -#define NRFX_EXAMPLE_CONFIG_LOG_ENABLED 1 -#define NRFX_EXAMPLE_CONFIG_LOG_LEVEL 3 -#include +#define TST_CLK_PIN 17 //this is led 0 pin on nrf52-dk +#define FREQ_MEASURE_PIN 11 -/** - * @defgroup nrfx_timer_counter_example Counter example - * @{ - * @ingroup nrfx_timer_examples - * - * @brief Example showing basic functionality of nrfx_timer driver in Timer Mode and Counter Mode. - * - * @details Application initializes nrfx_timer driver. The @ref timer_handler() is executed - * regularly after specified time ( @ref TIME_TO_WAIT_MS ). Moreover, @ref timer_handler() - * is executed when the counter value is equal to @ref COUNTER_MAX_VAL. - */ - -/** @brief Symbol specifying timer instance to be used in timer mode (T). */ -#define TIMER_T_INST_IDX 0 - -/** @brief Symbol specifying timer instance to be used in counter mode (C). */ -#define TIMER_C_INST_IDX 1 - -/** @brief Symbol specifying time in milliseconds to wait for handler execution. */ -#define TIME_TO_WAIT_MS 1000UL - -/** @brief Symbol specifying maximum value of the timer. */ -#define TIMER_MAX_VAL 3UL - -/** @brief Symbol specifying maximum value of the counter. */ -#define COUNTER_MAX_VAL 3UL - -/** @brief Symbol specifying the initial value of the timer. */ -#define TIMER_START_VAL 1UL - -/** @brief Global variable that is used to increment the value of a counter. */ -static volatile bool m_counter_inc_flag = false; - -/** - * @brief Function for handling TIMER driver events. - * - * @param[in] event_type Timer event. - * @param[in] p_context General purpose parameter set during initialization of - * the timer. This parameter can be used to pass - * additional information to the handler function, for - * example, the timer ID. In this example p_context is used to - * pass address of Timer instance that calls this handler. - */ -static void timer_handler(nrf_timer_event_t event_type, void * p_context) +void gpio_clock_8m(uint32_t pin_number) { - nrfx_timer_t * timer_inst = p_context; - static uint32_t timer_val = TIMER_START_VAL; + + NRF_TIMER0->PRESCALER = 0; // 16MHz + NRF_TIMER0->SHORTS = TIMER_SHORTS_COMPARE0_CLEAR_Msk; + NRF_TIMER0->CC[0] = 3; //1 for 16/2=8MHz for, 2 for 8/2=4MHz, 4 for 4/2=2MHz etc.. + NRF_TIMER0->BITMODE = (TIMER_BITMODE_BITMODE_16Bit << TIMER_BITMODE_BITMODE_Pos); + //using config [1] since [0] + NRF_GPIOTE->CONFIG[1] = GPIOTE_CONFIG_MODE_Task | (pin_number << GPIOTE_CONFIG_PSEL_Pos) | + (GPIOTE_CONFIG_POLARITY_Toggle << GPIOTE_CONFIG_POLARITY_Pos); - /* Creating timer driver instances to ensure that timer_X_inst.instance_id field matches - * timer_inst->instance_id. For example if user enables only timer2 with timer1 and timer0 - * disabled, then timer2->instance_id == 0. - */ - nrfx_timer_t timer_t_inst = NRFX_TIMER_INSTANCE(TIMER_T_INST_IDX); - nrfx_timer_t timer_c_inst = NRFX_TIMER_INSTANCE(TIMER_C_INST_IDX); + /*Connect TIMER event to GPIOTE out task*/ + NRF_PPI->CHEN |= 1 << 3; + *(&(NRF_PPI->CH3_EEP)) = (uint32_t) &NRF_TIMER0->EVENTS_COMPARE[0]; + *(&(NRF_PPI->CH3_TEP)) = (uint32_t) &NRF_GPIOTE->TASKS_OUT[1]; + NRF_PPI->CHENSET |= 1 << 3; - if (timer_inst->instance_id == timer_t_inst.instance_id) - { - /* Configuring timer to count form TIMER_START_VAL to TIMER_MAX_VAL */ - NRFX_LOG_INFO("Timer: %u", timer_val); - (timer_val == TIMER_MAX_VAL) ? timer_val = TIMER_START_VAL : timer_val++; + /*Starts clock signal*/ + NRF_TIMER0->TASKS_START = 1; +} - if (timer_val == TIMER_START_VAL) - { - m_counter_inc_flag = true; - } - } - else if (timer_inst->instance_id == timer_c_inst.instance_id) - { - NRFX_LOG_INFO("Counter finished"); +static void timer_init() //gate timer +{ + NRF_TIMER1->TASKS_STOP = 1; //trigger stop + NRF_TIMER1->MODE = TIMER_MODE_MODE_Timer; //mode timer + NRF_TIMER1->PRESCALER = 8; // Fhck / 2^8 + //total gate time of timer 62500 - 1s + NRF_TIMER1->CC[0] = 62501; //end gate count + NRF_TIMER1->CC[1] = 1; //start gate count. don't start at 0 to no start on clear. + + NRF_TIMER1->BITMODE = (TIMER_BITMODE_BITMODE_16Bit << TIMER_BITMODE_BITMODE_Pos); + + NRF_TIMER1->TASKS_CLEAR = 1; //trigger zero timer + NRF_TIMER1->INTENSET = (TIMER_INTENSET_COMPARE0_Enabled << TIMER_INTENSET_COMPARE0_Pos); //interrupt on end gate count + + NRF_TIMER1->EVENTS_COMPARE[0] = 0; //rest event flag for gate end + NRF_TIMER1->EVENTS_COMPARE[1] = 0; //rest event flag for gate start +} + +static void counter_init() //actual counter +{ + NRF_TIMER2->TASKS_STOP = 1; //trigger stop + NRF_TIMER2->MODE = TIMER_MODE_MODE_Counter; //counter + NRF_TIMER2->BITMODE = (TIMER_BITMODE_BITMODE_24Bit << TIMER_BITMODE_BITMODE_Pos); + NRF_TIMER2->TASKS_CLEAR = 1; //trigger zero counter + NRF_TIMER2->EVENTS_COMPARE[0] = 0; //reset event for compare +} + +//counter input pin setting +static void gpiote_init(uint32_t pin) +{ + NRF_GPIOTE->CONFIG[0] = 0x01 << 0; // MODE: Event + NRF_GPIOTE->CONFIG[0] |= pin << 8; // Pin number + NRF_GPIOTE->CONFIG[0] |= GPIOTE_CONFIG_POLARITY_LoToHi << 16; // Event rising edge +} + +//hardware trigger: stop of counter on event of end timer1 gate +static void ppi_timer_stop_counter_init() +{ + NRF_PPI->CHEN |= 1 << 2; //channel + *(&(NRF_PPI->CH2_EEP)) = (uint32_t)&NRF_TIMER1->EVENTS_COMPARE[0]; //attach end gate event + *(&(NRF_PPI->CH2_TEP)) = (uint32_t)&NRF_TIMER2->TASKS_STOP; //to counter stop trigger + NRF_PPI->CHENSET |= 1 << 2; //set channel +} + +//hardware trigger: start of counter on event of begin timer1 (gate) event.gate +static void ppi_timer_start_counter_init() +{ + NRF_PPI->CHEN |= 1 << 4;// channel + *(&(NRF_PPI->CH4_EEP)) = (uint32_t)&NRF_TIMER1->EVENTS_COMPARE[1]; //attach gate start event + *(&(NRF_PPI->CH4_TEP)) = (uint32_t)&NRF_TIMER2->TASKS_START; //to counter start trigger + NRF_PPI->CHENSET |= 1 << 4; +} + + +static void ppi_gpiote_counter_init() +//hardware attachment for the gpiote that was selected above +{ + NRF_PPI->CHEN |= 1 << 1; + *(&(NRF_PPI->CH1_EEP)) = (uint32_t)&NRF_GPIOTE->EVENTS_IN[0]; //attach pin change + *(&(NRF_PPI->CH1_TEP)) = (uint32_t)&NRF_TIMER2->TASKS_COUNT;//to one count + NRF_PPI->CHENSET |= 1 << 1; +} + +//gate end interrupt handler. Count is done at hardware and percice interrupt execution isnt critical +void TIMER1_IRQHandler(void) +{ + if (NRF_TIMER1->EVENTS_COMPARE[0] != 0) //end gate event + { + NRF_TIMER1->EVENTS_COMPARE[0] = 0; //reset end gate flag + NRF_TIMER1->EVENTS_COMPARE[1] = 0; //reset start gate flag + NRF_TIMER2->TASKS_CAPTURE[0] = 1; //trigger get counter value + + printk("cc: %dHz\n", NRF_TIMER2->CC[0]); //report to serial console + + NRF_TIMER1->TASKS_CLEAR = 1; //reset timer + NRF_TIMER2->TASKS_CLEAR = 1; //reset counter + + NRF_TIMER1->TASKS_START = 1; //start next count gate } } -/** - * @brief Function for application main entry. - * - * @return Nothing. - */ int main(void) { - nrfx_err_t status; - (void)status; + NVIC_EnableIRQ(TIMER1_IRQn); //enable timer1 interrupt + IRQ_DIRECT_CONNECT(TIMER1_IRQn, 3, TIMER1_IRQHandler, 0); //link interrupt flag to handler + NVIC_SetPriority(TIMER1_IRQn, 3); //set interrupt execution priority -#if defined(__ZEPHYR__) - IRQ_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_TIMER_INST_GET(TIMER_T_INST_IDX)), IRQ_PRIO_LOWEST, - NRFX_TIMER_INST_HANDLER_GET(TIMER_T_INST_IDX), 0, 0); - IRQ_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_TIMER_INST_GET(TIMER_C_INST_IDX)), IRQ_PRIO_LOWEST, - NRFX_TIMER_INST_HANDLER_GET(TIMER_C_INST_IDX), 0, 0); -#endif + struct device *dev;//port container for gpio management + dev = device_get_binding("GPIO_14"); //button SW1 + /**/ + //nrf_gpio_cfg(dev, FREQ_MEASURE_PIN, NRF_GPIO_DIR_INPUT|GPIO_ACTIVE_HIGH|GPIO_PULL_DOWN); //p0.11 freq in + nrf_gpio_cfg_input(14, NRF_GPIO_PIN_PULLUP); - NRFX_EXAMPLE_LOG_INIT(); + //init freq count hardware + counter_init(); + timer_init(); + gpiote_init(FREQ_MEASURE_PIN); + ppi_gpiote_counter_init(); + ppi_timer_stop_counter_init(); + ppi_timer_start_counter_init(); - NRFX_LOG_INFO("Starting nrfx_timer basic counter example."); - NRFX_EXAMPLE_LOG_PROCESS(); + //test clock hardware + gpio_clock_8m(TST_CLK_PIN); - /* Configuring timer instances, one in timer mode and one in counter mode. - * Assigning their own addresses to p_context variable - in order to reference them - * in timer_handler() function. Setting frequency to the base frequency value of the - * specified timer instance. - */ - nrfx_timer_t timer_t_inst = NRFX_TIMER_INSTANCE(TIMER_T_INST_IDX); - uint32_t base_frequency = NRF_TIMER_BASE_FREQUENCY_GET(timer_t_inst.p_reg); - nrfx_timer_config_t config = NRFX_TIMER_DEFAULT_CONFIG(base_frequency); - config.bit_width = NRF_TIMER_BIT_WIDTH_32; - config.p_context = &timer_t_inst; - status = nrfx_timer_init(&timer_t_inst, &config, timer_handler); - NRFX_ASSERT(status == NRFX_SUCCESS); - - nrfx_timer_t timer_c_inst = NRFX_TIMER_INSTANCE(TIMER_C_INST_IDX); - config.frequency = NRF_TIMER_BASE_FREQUENCY_GET(timer_c_inst.p_reg); - config.mode = NRF_TIMER_MODE_COUNTER; - config.p_context = &timer_c_inst; - status = nrfx_timer_init(&timer_c_inst, &config, timer_handler); - NRFX_ASSERT(status == NRFX_SUCCESS); - - NRFX_LOG_INFO("Time between timer ticks: %lu ms", TIME_TO_WAIT_MS); - - /* Creating variable desired_ticks to store the output of nrfx_timer_ms_to_ticks function. */ - uint32_t desired_ticks = nrfx_timer_ms_to_ticks(&timer_t_inst, TIME_TO_WAIT_MS); - - /* Setting the timer (in timer mode) channel NRF_TIMER_CC_CHANNEL0 in the extended compare - * mode to clear the timer and trigger an interrupt if internal counter register is equal - * to desired_ticks. - */ - nrfx_timer_extended_compare(&timer_t_inst, NRF_TIMER_CC_CHANNEL0, desired_ticks, - NRF_TIMER_SHORT_COMPARE0_CLEAR_MASK, true); - - /* Setting the timer (in counter mode) channel NRF_TIMER_CC_CHANNEL0 in the extended compare - * mode to stop the timer and trigger an interrupt if internal counter register is equal - * to COUNTER_MAX_VAL. - */ - nrfx_timer_extended_compare(&timer_c_inst, NRF_TIMER_CC_CHANNEL0, COUNTER_MAX_VAL, - NRF_TIMER_SHORT_COMPARE0_STOP_MASK, true); - - nrfx_timer_enable(&timer_c_inst); - nrfx_timer_enable(&timer_t_inst); - NRFX_LOG_INFO("Timer status: %s", - nrfx_timer_is_enabled(&timer_t_inst) ? "enabled" : "disabled"); - NRFX_LOG_INFO("Counter status: %s", - nrfx_timer_is_enabled(&timer_c_inst) ? "enabled" : "disabled"); - - uint32_t timer_c_curr_val = 0; - - while (1) - { - if (m_counter_inc_flag) - { - nrfx_timer_increment(&timer_c_inst); - timer_c_curr_val = nrfx_timer_capture(&timer_c_inst, NRF_TIMER_CC_CHANNEL1); - NRFX_LOG_INFO("Counter: %u / %lu", timer_c_curr_val, COUNTER_MAX_VAL); - m_counter_inc_flag = false; - - if (timer_c_curr_val >= COUNTER_MAX_VAL) - { - nrfx_timer_disable(&timer_t_inst); - nrfx_timer_disable(&timer_c_inst); - NRFX_LOG_INFO("Timer status: %s", - nrfx_timer_is_enabled(&timer_t_inst) ? "enabled" : "disabled"); - NRFX_LOG_INFO("Counter status: %s", - nrfx_timer_is_enabled(&timer_c_inst) ? "enabled" : "disabled"); - } - } - NRFX_EXAMPLE_LOG_PROCESS(); - } + //start freq count task + NRF_TIMER1->TASKS_START = 1; + while (1) { + //manage loop + } } - -/** @} */ diff --git a/sample.yaml b/sample.yaml index aaea2df..469f64b 100644 --- a/sample.yaml +++ b/sample.yaml @@ -1,6 +1,10 @@ sample: description: An example to showcase usage of the nrfx_timer driver when timer is in counter mode. name: nrfx_timer counter mode example +manifest: + projects: + - name: e73_tmb + path: boards_arm_e73_tmb tests: examples.nrfx_timer.counter: tags: timer